1. Field of the Invention
The present invention relates to an information reproducing circuit which is provided on an apparatus for optically recording or reproducing digital information in or from a recording medium, and more particularly, it relates to an information reproducing circuit which receives and binarizes a signal optically read from a recording medium and outputs the same as a digital signal.
2. Description of the Background Art
In general, a recording medium such as an optical disk or a magnet-optical disk forms a sector format which consists of a header part and a data part on its track through a gap, for recording/reproducing information in units of sectors.
FIG. 10 is a model diagram showing an exemplary sector format on a recording medium which is applied to the prior art and embodiments of the present invention. Referring to FIG. 10, the sector format includes a sector mark (SM) 30 indicating the head of the sector, VFO parts 31 which are signal regions employed by a VFO (variable frequency oscillator), producing synchronous clocks for demodulating data in an information reproducing system, for producing clocks synchronous with data in reproduction and arranged in a header part and at the head of a data part respectively, address marks (AM) 32, addresses (ID) 33, a postamble (PA) 34, synchronizing signals (Sync) 35, a buffer (Buffer) 36 and data 37. The VFO part 31 of the data part is provided for synchronous clock generation in reproduction as to the data 37 immediately following the same, while the VFO part 31 of the head part is provided for synchronous clock generation in reproduction as to the AM 32 and ID 33 immediately following the same.
An apparatus for recording/reproducing digital information in/from a recording medium such as an optical disk or a magnet-optical disk comprises an optical head for irradiating the recording medium with a laser beam for reproducing the information, a photodetector for photoelectrically converting change in quantity of light reflected by the recording medium upon irradiation with the laser beam into an electric signal, and an information reproducing circuit for binarizing the electric signal and reproducing the same into the original digital signal.
The photodetector detects reflected light of a constant quantity and feeble change in quantity of the reflected light resulting from digital information which has been recorded on the recording medium, and hence a DC component corresponding to the reflected light of the constant quantity is superposed on/appears in a signal of feeble digital information corresponding to the feeble change in quantity of the reflected light when the result of the photodetection is converted to an electric signal. The signal of the digital information (hereinafter referred to as a reproduced signal) is a feeble signal which is buried in a noise, and hence the obtained electric signal must be amplified for subsequent processing. In consideration of the dynamic range of an amplifier which is employed for the amplification at this time, it is effective to previously remove the DC component which is superposed on the reproduced signal. In the conventional apparatus, therefore, the DC component is removed from the reproduced signal by AC coupling in advance of the signal amplification. When the DC component is removed by AC coupling, however, part of a low-frequency component of the reproduced signal is also lost disadvantageously.
A circuit employing decision feedback is known as a reproducing circuit for compensating the low-frequency component as lost (refer to Japanese Patent Laying-Open No. 61-242442 (1986)). FIG. 11 is a block diagram showing the information reproducing circuit which is disclosed in Japanese Patent Laying-Open No. 61-242442. Referring to FIG. 11, the information reproducing circuit includes an input terminal 20, a high-pass filter (hereinafter referred to as an HPF) 21, an adder 22, a comparator 23, a constant voltage generator 24, a low-pass filter (hereinafter referred to as an LPF) 25 and an output terminal 26.
FIG. 12 is a spectral diagram illustrating the circuit operation of FIG. 11. With reference to FIGS. 11 and 12, the operation of the information reproducing circuit shown in FIG. 11 employing decision feedback is now described.
FIG. 12 shows the spectrum of an input signal A20 which is inputted in the input terminal 20 shown in FIG. 12 at (a). The input signal A20 is a reproduced signal from which a DC component superposed thereon has been removed by AC coupling, and part of its low-frequency component is lost. Upon passage through the HPF 21, this input signal A20 is converted to a signal A21 having a spectrum shown at (b) in FIG. 12.
In order to convert the spectrum of an output signal A22 from the adder 22 to that having a compensated low-frequency component as shown at (d) in FIG. 12, the spectrum of a signal A25 which is fed back must be that shown at (c) in FIG. 12. The comparator 23 and the LPF 25 shown in FIG. 11 generate the feedback signal A25 having the spectrum shown at (c) in FIG. 12.
The comparator 23 compares the output signal A22 from the adder 22 with a slice level signal A24 of a prescribed potential which is outputted from the constant voltage generator 24, to output a binarized signal A23 to the LPF 25. The LPF 25 removes a high-frequency component from the inputted binarized signal A23, to generate the feedback signal (feedback potential) A25. The potential of the slice level signal A24, which indicates a threshold value (called a slice level) for binarizing the signal A22 in order to obtain the original digital information from the signal A22, is decided by the amplitude of the reproduced signal depending on the standard of the medium recording the information. In general, the potential of the slice level signal A24 is set at half the data signal amplitude of the input signal A20. This is because digital information, which is recorded in general high-density recording carrying out mark edge recording, is present at the center of a reproduced data signal amplitude upon reproduction.
Consequently, the output signal A22 of the adder 22 shown in FIG. 11 has the spectrum in which the low-frequency component is compensated as shown at (d) in FIG. 12.
FIG. 13 is a waveform diagram showing the circuit operation of FIG. 11. The waveforms of the output signals A21 and A25 from the HPF 21 and the LPF 25 are shown at (a) and (b) in FIG. 13 in correspondence to the spectra shown at (b) and (c) in FIG. 12 respectively. The transient response at (a) in FIG. 13 results from an influence exerted by the cut-off frequency of the HPF 21. The waveform of the signal A22 shown at (c) in FIG. 13 in correspondence to the spectrum shown at (d) in FIG. 12 is formed by adding up the waveforms of the output signal A21 from the HPF 21 and the feedback signal A25 outputted from the LPF 25 shown at (a) and (b) in FIG. 13 with each other.
In the aforementioned circuit, however, the binarized signal A23 outputted from the comparator 23 may be instabilized or an error may be caused therein since (1) the slice level with respect to the signal is relatively changed or (2) the amplitude of the input signal A20 is small. This results in a remarkable problem in the case of generating clocks synchronous with data which are necessary for reproducing information from the binarized signal A23 by a PLL (phase locked loop) circuit (not shown) provided in a subsequent stage of this circuit, for example. Particularly when an error is caused in either VFO part 31, the PLL circuit cannot generate the synchronous clocks and hence data following the VFO part 31 in the sector cannot be reproduced or an error is caused in the reproduction. Also in the case of obtaining a digital signal from the output signal A22 of the adder 22 by PRML (partial response maximum likelihood) of reproducing the signal by the clocks generated by the PLL circuit, no accurate signal can be derived. Thus, it is extremely desirable to prevent the binarized signal of the VFO part 31 for creating the synchronous clocks from being stabilized or an error is caused in the signal A23.
With reference to FIGS. 14 to 16, description is now made on the case where the binarized signal A23 is instabilized and the case where an error is caused in the binarized signal A23 due to (1) relative change of the slice level with respect to the signal and (2) a small amplitude of the input signal A20.
(1) Relative Change of Slice Level With Respect to Signal
FIG. 14 is an enlarged view showing parts of the waveforms appearing in FIG. 13. FIG. 15 is adapted to illustrate the circuit operation of FIG. 11 upon relative change of the slice level with respect to the signal.
FIG. 14 shows the VFO part 31 of the output signal A21 from the HPF 21 in an enlarged manner, along with the waveform of a high-frequency signal B21 in the VFO part 31 at (a). FIG. 14 also shows an ideal feedback signal A25 at (b). This feedback signal. A25 cancels the transient response of the output signal A21 caused by the HPF 21. The feedback signal A25 shown at (b) in FIG. 14 is formed by inputting the binarized signal A23 outputted from the comparator 23, which is shown at (c) in FIG. 14, in the LPF 25. In reproduction of the VFO part 31, an ideal output signal A22 from the adder 22 shown at (d) in FIG. 14 can be obtained when the binarized signal A23 is a pulse train having a duty ratio of 50%.
When the relative slice level in the reproduced signal fluctuates by a low-frequency noise in the reproduced signal or amplitude fluctuation resulting from fluctuation in light reflectance of the recording medium or the like, however, the binarized signal A23 corresponding to the VFO part 31 outputted from the comparator 23 shown in FIG. 11 is not a pulse signal having a duty ratio of 50%. At this time, the waveform of the feedback signal A25 which is outputted from the LPF 25 following the comparator 23 differs from the ideal waveform shown at (b) in FIG. 14. Considering that the decision feedback is positive feedback, this difference is propagated as an error. This is explained in more concrete terms with reference to waveforms shown in FIGS. 14 and 15.
FIG. 15 shows the waveform of the output signal A21 from the HPF 21 at (a). When ideal decision feedback is made on this signal A21, the output signal A22 of the adder 22 has the waveform shown at (d) in FIG. 14. When a relative slice level (c24) is converted to a slice level (d24) having a potential which is higher by .DELTA.V due a low-frequency noise of the reproduced signal or amplitude fluctuation, however, the pulse duration of the binarized signal A23 outputted from the comparator 23 is smaller than that of a signal having a duty ratio of 50%. Consequently, the level of the feedback signal A25, shown at (b) in FIG. 15, which is processed by the LPF 25 is reduced as compared with that of the ideal feedback signal shown at (b) in FIG. 14. Thus, the level of the output signal A22 from the adder 22 is also reduced as a matter of course, and hence the pulse duration of the binarized signal A23 which is obtained by slicing the signal A22 by the comparator 23 through the relative slice level d24 is further reduced. FIG. 15 shows the waveform of a signal cotained by adding the feedback signal A25 to the signal A21 at (c). The waveform shown at (c) in FIG. 15 extremely differs from the ideal waveform shown at (d) in FIG. 14. This is an instable output signal having an uncanceled transient response. Thus, instability of the signal caused by relative fluctuation of the slice level results in an important problem in synchronous clock generation or data reproduction.
(2) Small Amplitude of Input Signal A20
The decision feedback shown in FIG. 11 is positive feedback, and hence an error which is once caused in the circuit shown in FIG. 11 is propagated. Particularly when the reproduced signal has a small amplitude due to fluctuation in light reflectance, propagation of the error is remarkable. This phenomenon is now described with reference to FIG. 16, which is adapted to illustrate the circuit operation of FIG. 11 in relation to a small amplitude of the input signal.
FIG. 16 shows waveforms of two signals X and Y having the same frequency and offset values and different amplitudes at (a). It is assumed that the signals X and Y shown at (a) in FIG. 16 are enlarged waveforms of the output signal A22 from the adder 22 in signal reproduction of the VFO part 31 which is positioned at the head of the data part, and dc levels thereof are inclined due to an influence exerted by an error caused in the circuit for the decision feedback. FIG. 16 shows waveforms of signals X23 and Y23 which are obtained by binarizing the signals X and Y in the comparator 23 respectively at (b), along with an ideal binarized signal Z23 having a duty ratio of 50% as a signal which is compared with the binarized signals X23 and Y23. It is understood that the binarized signal Y23 corresponding to the signal Y of a smaller amplitude has larger waveform displacement from the ideal binarized signal Z23 as compared with the binarized signal X23 corresponding to the signal X of a larger amplitude. This also applies to respective waveforms of feedback signals X25, Y25 and Z25 corresponding to the binarized signals X23, Y23 and Z23 outputted from the LPF 25, as shown at (c) in FIG. 16.
It is also understood from FIG. 16 that propagation of an error is further remarkable when a binarized signal is obtained in the comparator 23 if the amplitude of the reproduced signal is small. Particularly in reproduction of the VFO part 31 having a small signal amplitude, therefore, the binarized signal A23 which is outputted from the comparator 23 is displaced from the ideal binarized signal and the output signal instabilized.